- Compilation/
Parity Table
Parity Table
The parity table describes the phase factor in the phase polynomial intermediate representation. Technically, the parity table on its own is not an intermediate representation as it further requires the phase angles and parity matrix to describe (CNOT, ) circuits (phase polynomials),
Sometimes, the phase factor itself is called the phase polynomial, which adds confusion to the terminology. We refer to phase polynomial intermediate representation for a full overview.
Inputs
- (CNOT, ) circuit with qubits and gates
Outputs
- binary matrix with
Example
Image taken from [1].
We go through each gate of the circuit and note down its action on the binary input state . A CNOT gate adds the control value onto the target value. A gate collects the current parity, which is the logical value of that qubit. E.g. the first CNOT alters the first qubit value to . The corresponding parity that we collect at the first gate is , as we have qubits in total, and its angle . We continue doing so throughout the circuit and collect the parities , , and , which we can summarize in the corresponding parity table
and angle vector .
The overall accumulated phase of the circuit is given by
Typical usage
Parity tables are utilized in the phase polynomial intermediate representation for (CNOT, ) circuits.
References
[1] "Phase polynomials synthesis algorithms for NISQ architectures and beyond", Vivien Vandaele, Simon Martiel, Timothée Goubault de Brugière arXiv:2104.00934, 2021
Cite this page
@misc{PennyLane-ParityTable, title={Parity Table}, howpublished={\url{https://pennylane.ai/compilation/parity-table}}, year={2025} }
Page author(s)
Korbinian Kottmann
Quantum simulation & open source software